Hahahaha oh brilliant move.

  • overworkedandundersane@lemmy.world
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    1 day ago

    The silicon foundries in Taiwan are some of the most advanced in the world right now - they can make manufacture integrated circuits down to a 3nm process node. They’re absolutely cutting-edge.

    Basically, every phone or consumer electronics processor, memory same solid state storage chip, plus a ton of custom circuits are made there right now. This includes multi-GHz radios (WiFi, radar, sensing technologies, global navigation systems) and a ton of new MEMS (Micro Electro Mechanical Systems) sensors for gyroscopes, accelerometers, compasses, barometric pressure, gas sensors…

    The foundries in Taiwan are absolutely critical to worldwide supply chains and defense. There are rumors that the Taiwan foundries are wired with explosives as a deterrent to Chinese invasion - China wants the foundries but Taiwan will try to deny them if they invade.

    • Dogyote@slrpnk.net
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      1 day ago

      How long has this been the case? And do all of those devices need chips with 3nm process nodes? Why can’t a slightly inferior chip be used?

      • NotMyOldRedditName@lemmy.world
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        1 day ago

        You can use an inferior chip, but the few fabs that are out there are many generations behind. Suddenly your cruise missile has reduce accuracy, or range, or detection avoidance etc. Your targeting lock on is slower, your radar doesn’t detect as well etc.

        The fab Taiwan built in the US is 2-3 generations behind I believe, intentionally, so the most cutting edge stuff was still theirs.

        Samsung is the next closest at 7nm if I’m seeing things right and it gets much worse from there and it quickly goes to the teens or higher.

        For you and me, it could be like getting laptops/phones 5-10 years old tech wise as there aren’t enough of the near level fabs to support everything, and that’s not getting into all the fancy things like what Apple does with their SoC, no one else might be able to do that kind of thing.

      • overworkedandundersane@lemmy.world
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        1 day ago

        This has been the case for at least a couple of decades.

        All those devices don’t necessarily need the 3nm node - but all the engineering effort to make, say, a new mobile phone processor - will go towards a specific process node. Each process node your target for a new chip needs a set of masks for the photolithography process.

        The smaller the process node, the more these masks end up costing (newer process nodes are approaching $50M per set). These masks are also custom made for the foundry you’re using them in (due to manufacturing variations), so if you want multiple foundries for security of supply, spend a few more tens of millions for each additional foundry.

        The advantage of a small process node, though, is that the cost of the individual chips start to approach “free” once you’ve paid for that first one. :)

        You can’t just make a new processor and run it on multiple process nodes without doing a whole lot of work, even besides mask sets. Any custom logic in the CPU core will have to be designed to work with that process node’s timing and power parameters. The timing closure on any process node is painstakingly detailed work - especially because you’d need a new mask set, or at least part of one.

        Then you have to consider peripherals - when you build a processor, you’re going to need RAM. If you want to use the newest DDR5 on your processor, you need a DDR5 controller in your CPU to be able to talk to the memory. That DDR5 controller (provided and guaranteed by a third party, unless you want to try your hand at rolling your own) is only going to exist for one or two process nodes - again, because it’s a lot of work and expense to get up and running in the first place, so the vendor that provides that controller is only going to invest in the process nodes that make sense for it.

        You’ll need these controllers for all your communication interfaces - USB, eMMC, PCIe, SPI, GPIO… And they all have to exist for the node you’ve chosen. Then you need to verify in simulation that your logic can interface to their logic at the speeds you want to run. It gets complicated really quickly.

        Source: I’m a chip designer.

        Edits: Fixing my terrible grammar.